By Brian T. Graham
This is a milestone in machine-assisted microprocessor verification. Gordon  and Hunt  led the best way with their verifications of sim ple designs, Cohn [12, thirteen] this with the verification of elements of the VIPER microprocessor. This paintings illustrates how a lot those, and different, pioneers completed in constructing tractable versions, scalable instruments, and a strong technique. A condensed overview of prior re seek, emphasising the behavioural version underlying this kind of verification is by means of a cautious, and remarkably readable, ac count number of the SECD structure, its formalisation, and a record at the organization and execution of the automatic correctness facts in HOL. This monograph stories on Graham's MSc undertaking, demonstrat ing that - within the correct palms - the instruments and method for formal verification can (and for that reason should?) now be utilized through a person with little prior services in formal tools, to ensure a non-trivial microprocessor in a restricted timescale. this isn't to belittle Graham's success; the construction of this facts, paintings ing as Graham did from the former literature, is going well past a customary MSc venture. The success is that, with this exposition handy, an engineer tackling the verification of comparable microprocessor designs may have a transparent view of the milestones that has to be handed at the means, and of the the right way to be utilized to accomplish them.
Read Online or Download The SECD Microprocessor: A Verification Case Study PDF
Similar international books
Mobile Information Systems II: IFIP International Working Conference on Mobile Information Systems, MOBIS 2005, Leeds, UK, December 6-7, 2005 (IFIP International Federation for Information Processing)
Cellular info platforms II presents a set of analysis at the making plans, research, layout, development, amendment, implementation, usage, evaluate, and administration of cellular details platforms. The articles specialize in the results of this examine on this planet of trade, and deal with technical matters and constraints on cellular info platforms functionalities and layout.
Simulation-Based Engineering and technology (Sbe&S) cuts throughout disciplines, exhibiting super promise in parts from typhoon prediction and weather modeling to realizing the mind and the habit of diverse different advanced platforms. during this groundbreaking quantity, 9 extraordinary leaders check the most recent learn developments, because of fifty two website visits in Europe and Asia and hundreds and hundreds of hours of professional interviews, and speak about the consequences in their findings for the U.S. govt.
This publication constitutes the refereed lawsuits of the 1st overseas convention on Interactive Theorem proving, ITP 2010, held in Edinburgh, united kingdom, in July 2010. The 33 revised complete papers awarded have been rigorously reviewed and chosen from seventy four submissions. The papers are equipped in issues similar to counterexample iteration, hybrid procedure verification, translations from one formalism to a different, and cooperation among instruments.
- IEEE International Conference on Fuzzy Systems: March 8-12, 1992, Town & Country Hotel, San Diego, California
- Computational Intelligence: Revised and Selected Papers of the International Joint Conference, IJCCI 2011, Paris, France, October 24-26, 2011
- Getting ahead as an international student (Open Up Study Skills) by Burnapp (2009-07-01)
- Reliability, Quality and Safety of Software-Intensive Systems: IFIP TC5 WG5.4 3rd International Conference on Reliability, Quality and Safety of Software-Intensive Systems (ENCRESS ’97), 29th–30th May 1997, Athens, Greece
- Third International Conference on System Science in Health Care: Troisième Conférence Internationale sur la Science des Systèmes dans le Domaine de la Santé
- Macromolecular Chemistry-11: Plenary and Sectional Lectures Presented at the International Symposium on Macromolecules (the Third Aharon Katzir-Katchalsky Conference) (Volume 11)
Additional info for The SECD Microprocessor: A Verification Case Study
DU M creates the environment with the installed n placeholder. The RAP instruction is similar to the AP instruction, except that in creating the environment in which the function is executed, the parameters are installed by using the rplaca operation on an environment whose car is the pending value n. e). The list of parameters must consist of only function objects, and they will all contain the same environment component, so the single destructive operation creates a circular context for all the mutually recursi ve defini tions.
The interface to the external memory gives rise to the possibility of undesirable power dissipation. This can occur if both memory and SEeD devices drive external lines simultaneously for some overlapping interval, which is possible given capacitance induced delays of signal switching. A more considered interface than the "memory as a register" view used until now is needed. 30 ne could devise a scenario where the rpB signal overlaps the start of the pulse, and thus random write signals may be generated.
Implementing the controller as a finite state machine requires buffering between current and next states. This is achieved by the use of a two-phase non-overlapping clocking scheme and paired master/slave registers, along the design style described in . The state register in the control unit is the mpe register, but in a more general sense, the values on the 4-deep microcode subroutine stack are also part of the state. In the following discussion, references to the mpe register can be applied similarly to the stack registers.