By Ban Wong, Anurag Mittal, Yu Cao, Greg W. Starr

A needs to learn for each customized circuit fashion designer engaged on 90nm and past. caution! this isn't for the amateur! A wealth of data. cannot look forward to the following publication via the authors.

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Schruefer, A. Katsetos, Z. Yang, N. Rovedo, T. Hook, C. Wann, and T. Chen, Mechanism of threshold voltage shift ( Vth ) caused by negative bias temperature (NBTI) instability in deep sub-micron pMOSFETs, Jpn. J. Appl. , Vol. 41, Pt. 1, No. 4B, pp. 2424–2425, Apr. 2002. [19] A. Stamper, Interconnection scaling to 1 GHz and beyond, MicroNews, Vol. 4, No. 2, first quarter 1998. net. [21] P. Ranade, H. Takeuchi, W. Lee, V. Subramanian, and T. King, Application of silicon–germanium in the fabrication of ultra-shallow extension junctions for sub100 nm PMOSFTs, IEEE Trans.

Ranade, H. Takeuchi, W. Lee, V. Subramanian, and T. King, Application of silicon–germanium in the fabrication of ultra-shallow extension junctions for sub100 nm PMOSFTs, IEEE Trans. Electron Devices, Vol. 49, No. 8, Aug. 2002. REFERENCES 23 [22] S. , A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low κ ILD, and 1 µm2 SRAM cell, IEEE International Electron Devices Meeting, 2002. [23] A. Grove, Changing vectors of Moore’s law, IEEE International Electron Devices Meeting, 2002.

28] G. Moore, No exponential is forever. . , keynote, IEEE International Solid-State Circuits Conference, 2003. 1 EQUIPMENT REQUIREMENTS FOR FRONT-END PROCESSING The past decade has seen significant breakthroughs in the field of integrated circuit (IC) technology. In the back end of the line, RC improvements are due to migration to copper and low-κ interlayer dielectrics with unique integration schemes such as dual damascene. In the front end of the line, only a few atomic monolayers reliable gate oxynitride is used routinely in high-performance devices.

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